Wait, there will be actual Zen3 7nm products with 3D V-Cache? I understood it as only showing a comparison with a Zen3 sample, but no actual products?
 Anandtech's article isn't sure about this as well. Waiting for more info.ID: h05ms29ID: h05n57u
Currently it is obviously only a prototype so no actual products planned. But who knows if Alder lake end up beating Zen3 in gaming. Having a 15% gaming performance uplift is certainly enough to beat AL
This is most certainly a backup plan to retain the performance crown if Zen 4 has delivery issues. This is basically a play right out of Intel's playbook.ID: h05l4n6
highly doubt, probably just a sample made to demo the technology, i think it'd be useful in Epyc class more than consumers spaceID: h05orll
A limited Zen 3+ run with those super L3 cache would be a great halo products launch run.ID: h05paku
It'd be weird to demo a game for something they're mainly intending for serversID: h05z6qq
It had a tangible uplift in gaming performance, it's clear that it's also useful on gaming.
Besides, SRAMs aren't new, Intel had this on the 5775c as a lower level L4 cache and Xbox 360 also used some sort of an SRAM, what's new is how AMD complemented this to their chiplet designs by utilizing 3D stacking.ID: h05qbov
They did really say release something on Q4. Given that they cancel Zen3+, this might the answer why they abandon it and make this instead to bring 10% performance uplift. One thing is for sure, it might be expensive.
The fact that AMD intends to start production at the end of the year well before the expected rollout of Zen 4 may indicate that it may be used for the rumored Zen 3 refresh to counter Intel before Zen 4 at the end of 2022.ID: h05zmm8
Precisely, AMD knows Alder Lake is not a threat to Zen 4, but they can't leave Zen 3 fending for itself if Alder Lake truly is that good. surprisingly if adding an SRAM can push up to 15% gaming performance improvement on its own, I don't think AMD has anything to worry about Alder Lake unless the latter has some really big jump in overall performance.ID: h06zbg6
I think AMD has delayed Zen4 because Zen3+ will cover the upcoming Intel chips.ID: h073d9t
I hope ! One last hurrah for the am4 boardsID: h075rm4
Honestly, I'd prefer this over Zen4 or AL right now.
This was the real highlight of the show.ID: h05m1ww
FSR is great an all, but this is was AMD really flexing at how far ahead their CPUs are.
Also noticed that Lisa Su was so in her element with the engineering speak this segment involved.ID: h05ms07
I’m hoping Intel’s new CEO is allowed to geek out just like Lisa instead of being restrained on a tight leash. Both people are incredibly talented in the field and should be allowed to speak a little bit on subjects they naturally know a lot about.ID: h0680v8
Also noticed that Dr. Lisa Su was so in her element with the engineering speak this segment involved.
Fixed it for you!ID: h05qzl9
I wasn't expecting this til Zen4 next year. AMD filed this patent around the time of Zen+.
Can’t wait for the userbenchmark review /sID: h05ztp6
"Why are the AVX-512 benchmark scores counting for more than 50% of the CPU score weighing?"
"It makes sense if you don't think about it."ID: h061yjj
wait till zen 4 supports avx 512
now they will judge scores base on the performance of little atom cores, and if you dont have one, its a zero
AMD's motto Moar Cores Moar CacheID: h05qnkl
Operating System in Cache = Profit.ID: h05zgjt
Can't have cache miss if everything is in the cache.
Taps foreheadID: h05ok4o
Why not both?ID: h05p5z4
Who knows, maybe that’s a play they’re going to try out later on
First it’s all about more cores and threads, now they’re working out bigger caches
Maybe the next generation after will combine them both
Sounds like a good theory to me but then again, who knowsID: h05w09a
Patrick from STH suggested they could move the CCD to a smaller node (like TSMC 5nm) with more space for cores, and put a cache die made on the older 7nm node on top to provide L3 cache.
Unfortunately the cache would not be accessible as regular system memory. Otherwise we would be able to run a complete Linux server on it.ID: h06nn0l
there's no reason why you'd want to do this on a PC because 99.999...% of the accesses to the memory by volume aren't gonna be the OS, and if you're looking for high "idle" energy efficiency x86 PC is a terrible platform for it to begin with
there's a good reason why the caches on CPU (and GPU) are obfuscated by the memory controller, the processing units quite universally "know better" than the OS, and communicating to the OS would slow the whole process down and defeat the purpose of having a fast cache to begin withID: h05pssl
If you can fit the OS into the cache, you can still just back it with a tiny bit of NVM.
This is the mic drop moment!
This is huge. Zen4 could even be 40% faster than Zen3 with this technology implemented.ID: h08atjl
Node Shrink + Cache stack change together it could indeed be possible. I was planning to wait til Zen 5 to upgrade my 3900X, but if Zen 4 is really that good I would upgrade to Zen 4 in a heartbeat.
This will blow the lid off the APU market, especially in mobile segment.
I dunno what AMD's play here is with this announcement regarding the "equivalent generation" bump comment. If this is included in Zen 4 on top of a node shrink, even more architecture changes and a new IO die, it's going to be an absurd blowout for AMD. But it can't be Zen 3+ because it's shipping only in "high end products" which I assume to mean some unicorn EPYC CPUs.ID: h05l91e
I doubt they'd be hailing the gaming performance of an enterprise SKU like that.ID: h05mm1w
Probably Milan-X, 5800x, 5900x, 5950x. AMD wouldn't make a prototype AM4 chip, show it off, and not use it.ID: h05tdk8
well, it's chiplet technology. That chiplet can go equally into desktop or serversID: h05okru
Just imagine the ipc gains from zen 4 uarch, coupled with the 3d cache gains, and higer clock lower latency new design at 6nm IO die, DDR5 simultaneous reads and writes and higher bandwidth, that would bring ipc gains close to 30% i bet, then add in some clock gains and single threaded perf is going to be trough the roof. Its insane and for me that was the star of the show, even more than FSR.ID: h05kypy
They are just flexingthe gains on intel and showing a proof of concept, and to make customers think twice before buying an intel chip right now.
Then probably putting it into the zen4 as an actual product.
+15% is a lot I dont think ALderlake can get to 10%ID: h05nkgd
Lol definitely not within any sort of power limits.
AMD just keeps killin it. To think that in their recent history, a severe lack of innovation and risk taking nearly dragged them under for good. Pretty interesting watching them go from strength to strength coming from that tenuous position.
so basically this confirms the earlier leak of zen 4 ihsID: h05mu7u
I don't think so. But I do think this confirms the "Warhol" thing a while back
Can this be used to give APUs an aproximation of Infinity Cache ?
Imagine Intel pulling the Bill Gates cache variant: "you don't need more than 64mb of L3 cache"ID: h06l6bt
isn't the very most you can get on an intel desktop CPU right now like 22MB or something
11900K got 16MB lol
Purely a guess but I reckon they'll release 5000 series "XT" CPU's with a slight clock speed increase and this V-Cache technology as a stop gap before Zen 4 so they at least have something to compete with Intels Alderlake later this year, Hopefully it will mean X570 owners have 1 final upgrade path, It would also kind of coincide with the "new" X570S motherboards coming out in a few weeks.
I think this might be the "Warhol" thing that was rumored a while back. It is this prototype.
Not too sure how mature this technology is. Currently it is obviously only a prototype so no actual products planned. But who knows if Alder lake end up beating Zen3 in gaming. Having a 15% gaming performance uplift is certainly enough to beat AL