AMD Epyc Milan-X Server CPUs w/ 3D V-Cache Almost Ready to Launch

1 : Anonymous2021/08/25 18:09 ID: pbgu57
AMD Epyc Milan-X Server CPUs w/ 3D V-Cache Almost Ready to Launch
2 : Anonymous2021/08/25 21:13 ID: haccv5h

I just want Zen3 Threadripper, doesn’t even have to be the 3D variety…

ID: hacey0q

Is there a point in getting a threadripper if it’s not a work station?

ID: hacflq1

It's not terrible for smaller single socket servers either but yeah workstation is the target audience. Also quite livable for day-to-day tasks but not optimized for that (in cost or performance characteristics) so a bit of a waste if it's not also being used as a workstation or server.

ID: hacfqzu

I am building a workstation that will also be for gaming. At the end of the day, people can build whatever the hell they want is the way I see it.

3 : Anonymous2021/08/25 22:15 ID: haclp9i

Does this mean, we're getting the Epyc die rejects for 5900x and 5950x ?

That would explain why only 12 and 16 core cpus get 3dcache thing.

I was hopping Ryzen comes out first so we get the best die not rejects 🙁

ID: hacofxm

you always get the rejects doesn't matter if epyc launched first or after it.

also keep in mind that for epyc they are optimizing for a different thing, for servers its usually the most efficient dies that get chosen, while for gaming and high clocks one wants dies that are quite efficient but not the most efficient as the most efficient tend to not clock as high

4 : Anonymous2021/08/25 22:32 ID: haco1hk

At computex AMD used the language 'going into production at the end of the year'(2021).

Wonder what 'almost ready to launch' means in that context. What they said at computex implied a 1h 2022 product, but 'almost ready to launch' in the middle of Q3 implies a Q4 2021 product.

5 : Anonymous2021/08/25 18:35 ID: habp1rv

This whole thing seems like an Odd move admist a silicon shortage. Packing 50% more 7nm silicon into each product can’t be all that good news for supply. And maybe server customers would be willing to pay 50% more, (some workloads could probably double in speed with that much L3), consumers won’t be willing to pay that for a mere ~15% IPC especially when they can’t buy a GPU to even leverage all that CPU grunt.

ID: habsh8t

Wrong way to look at it I think. This is a generational performance jump whilst only using 50% 'new' silicon.

It also derisks the technique for future processes whilst utilising a process that will become only more available as time goes on as the leading edge stuff starts/is moving to 5/3nm.

Consumer prices are not 1:1 linked with the silicon useage either. 50% more silicon does not mean a 50% price increase. I reckon it'll be about 15-25%. And people do pay that for a new generation of performance at the top end.

ID: habxzgm

Also, if the cache is smaller than the 8core chiplet they may be able to put some of the the cache chiplet in the edge gaps for the same wafers as the cores.

ID: habyt0m

This is a generational performance jump whilst only using 50% 'new' silicon

For server workloads? Probably not.

ID: hac1cfi

AMD and other companies have clarified that silicon isn’t really the issue anymore, it’s the substrates. So adding V-cache just lets them use up excess wafers that are currently useless until the substrate supply improves. You can’t make any type of chip without substrate.

ID: habwyj0

Just guessing here, but a waver that is almost completely cache is probably easier, faster and cheaper to manufacture (less layers?) than the actual CCDs with logic. So the actual impact on the fab's capacity may be (much) smaller than you think. As far as I know, there is no silicon wafer shortage but the bottleneck is the fab's capacity/throughput.

ID: hacgow9

Fewer layers, simpler lithography, simpler circuit layouts, and built in redundancy make SRAM yields naturally higher. Combined with the smaller die sizes and AMD will produce a run of SRAM wafers for a day and be good for a month. The bottleneck is likely in the assembly... Shaving the CCD, shaving the SRAM, alignment, joining, adding the architectural silicon... Every bit of additional handling has a risk involved. Even 95% yield at that stage will be painful and more of a concern than the SRAM yield and cost.

ID: habsnil

And maybe server customers would be willing to pay 50% more

Oh believe me, they would. The more XFlops they can get into a single box the better.

Edit: update

ID: habqyml

Is the cache in 7 NM node?

ID: habrgvq

Yep, 36mm2 of it per chiplet

ID: hac2bcn

Server CPUs are one of AMDs most profitable products. AMD already stated they are focusing on premium products during the shortage.

ID: haby7fp

Yeah, this chip shortage, or at least the news of it, seems to be fabricated to me. I mean, take Samsung for example.... they said they weren't releasing a new Galaxy Note due to the chip shortage this year.... so instead, they launch two new, even more complicated, phones: the ZFlip 3 and ZFold 3 along with new earbuds and 2 different S pens, all requiring little chips.

ID: hac3yg2

The chip shortage exists, it's just 99% of people dont understand what it means. It doesn't mean that chip production is crippled, it just means there's so much demand that customers are struggling to get their needed orders in to keep up with this demand.

Samsung produce their own chips and therefore have as much supply as they deem they need, essentially. Companies like Apple also get basically all the chips they need because they put massive orders in well ahead of time and secure capacity. Similar with the likes of Sony and Microsoft who are selling record numbers of consoles at the moment.

ID: habzfou

Okey dokey Mr. Conspiracy. I’m sure the new Flips and Folds had a huge impact on other product lines, after all there’s dozens of them out there.

引用元:https://www.reddit.com/r/Amd/comments/pbgu57/amd_epyc_milanx_server_cpus_w_3d_vcache_almost/

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